Digitally Assisted Pipeline ADCs: Theory and Implementation by Boris Murmann
By Boris Murmann
With the arrival of strong electronic sign processing in moveable digital purposes, we've seen a becoming, unhappy call for for energy effective, high-speed and high-resolution analog-to-digital converters (ADCs). whereas know-how scaling has ended in innovative profits in electronic computing energy and effort potency, development in analog-to-digital conversion interfaces has been relatively sluggish. Digitally Assisted Pipeline ADCs: concept and Implementation explores the chance to minimize ADC strength dissipation by means of leveraging electronic sign processing features in nice line built-in circuit know-how. The defined digitally assisted pipelined ADC makes use of a statistics-based approach identity process as an permitting aspect to switch precision residue amplifiers with uncomplicated open-loop achieve levels.
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E. for a given converter speed, we assume that the device is biased to yield fT while maximizing gm/ID. 18µm 40 30 20 10 0 0 50 100 150 f s [M Hz] 200 250 Figure 3-15. Noise limited circuit energy versus speed and technology. 300 SCALING ANALYSIS 37 The underlying equation for Figure 3-15 can be derived from (3-20) as 1 § g · VDD ¨¨ m ¸¸ © I D ¹( f FOM PSD v . (3-24) T ) From the result illustrated in Figure 3-15, we see that just like in the flash analysis, each technology becomes better than its predecessor only after a certain frequency boundary.
SCALING IMPACT ON MATCHING-LIMITED CIRCUITS Having identified basic device performance scaling trends, we now relate this data to performance of analog building blocks. The following discussion focuses on basic building blocks that comprise ADCs and distinguishes between “matching-limited” circuits discussed in this section and “noise-limited” circuits considered in section 5. As an example of a matching-limited circuit we study the impact of scaling on flash ADCs. Due to the low resolutions (~4-8 bits), thermal noise tends to be of minor concern in this architecture.
Identification and scaling analysis of transistor performance metrics that are important for analog circuits. – An investigation of how scaling of transistor metrics affects the power efficiency of analog circuits. Here, we distinguish between “matching limited” and “noise-limited circuits,” and focus on representative building blocks of flash- and pipelined ADCs respectively. 16 2. Chapter 3 BASIC DEVICE SCALING FROM A DIGITAL PERSPECTIVE From a digital circuit perspective, MOS transistors have been scaled continuously to achieve: (1) higher integration density and reduced cost, (2) higher speed, and (3) lower power consumption.